BREAKING CHANGE: backup before full refactoring

Cargo.toml

@@ -11,7 +11,7 @@ embedded-hal = "1.0"
 usb-device = "0.3.2"
 
 [dependencies.avr-device]
-version = "0.5.4"
+version = "0.8.1"
 features = ["atmega32u4"]
 
 # The latest releases of `proc-macro2` do not support the rust toolchain that

rust-toolchain.toml

@@ -1,4 +0,0 @@
-[toolchain]
-channel = "nightly-2024-06-13"
-components = [ "rust-src" ]
-profile = "default"

src/lib.rs

@@ -6,7 +6,7 @@ use avr_device::{asm::delay_cycles, interrupt::free};
 use usb_device::{
     bus::{PollResult, UsbBus},
     endpoint::{EndpointAddress, EndpointType},
-    Result as UsbResult, UsbDirection, UsbError,
+    Result as UsbResult, UsbDirection as Dir, UsbError,
 };
 
 mod types;
@@ -21,22 +21,17 @@ const UDINT_CLEAR: u8 = !(1 << 7 | 1 << 1);
 impl<const L: usize> UsbBus for UsbDevice<L> {
     fn alloc_ep(
         &mut self,
-        ep_dir: UsbDirection,
+        ep_dir: Dir,
         ep_addr: Option<EndpointAddress>,
         ep_type: EndpointType,
         max_packet_size: u16,
         _interval: u8,
     ) -> UsbResult<EndpointAddress> {
-        // Handle first endpoint. //
+        let target_ep_index = match ep_addr {
-
+            Some(ep) if ep.index() == 0 && ep_dir == Dir::In => {
-        if ep_addr == Some(EndpointAddress::from_parts(0, UsbDirection::In)) {
+                return ep_addr.ok_or(UsbError::InvalidState);
-            ep_addr.ok_or(UsbError::InvalidState)
+            } // TODO: rewrite to bind pattern with @
-        } else {
+            Some(ep) if !self.ep_table[ep.index()].is_allocated => Ok(ep),
-            let address = match ep_addr {
-                // If current endpoint doesn't allocated, assign ep_addr to variable. //
-                Some(addr) if !self.ep_table[addr.index()].is_allocated => addr,
-
-                // If ep_aadr not provided, or current endpoint is allocated, try to find next free endpoint, otherwise return UsbError. //
             _ => {
                 let index = self
                     .ep_table
@@ -49,37 +44,26 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
                     .map(|(index, _)| index)
                     .ok_or(UsbError::EndpointOverflow)?;
 
-                    EndpointAddress::from_parts(index, ep_dir)
+                Ok(EndpointAddress::from_parts(index, ep_dir))
             }
-            };
+        }?;
-
-            // Select endpoint info by address index. //
-
-            let target_endpoint = &mut self.ep_table[address.index()];
-
-            // Get power of two number of endpoint size. //
 
         let ep_size = max(8, max_packet_size.next_power_of_two());
 
-            // Endpoint allocation marker. //
-
         if DPRAM_SIZE - self.dpram_already_used < ep_size {
-                Err(UsbError::EndpointMemoryOverflow)
+            return Err(UsbError::EndpointMemoryOverflow);
-            } else {
+        }
-                // Set endpoint parameters. //
 
-                target_endpoint.set_dir(ep_dir);
+        let target_ep = &mut self.ep_table[target_ep_index.index()];
-                target_endpoint.set_type(ep_type);
-                target_endpoint.set_size(ep_size)?;
 
-                // Add used dpram memory. //
+        target_ep.set_dir(ep_dir);
+        target_ep.set_type(ep_type);
+        target_ep.set_size(ep_size)?;
 
-                target_endpoint.is_allocated = true;
+        target_ep.is_allocated = true;
         self.dpram_already_used += ep_size;
 
-                Ok(address)
+        Ok(target_ep_index)
-            }
-        }
     }
 
     fn enable(&mut self) {
@@ -88,31 +72,31 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
 
             // Enable USB pads regulators. //
 
-            usb.uhwcon.modify(|_, w| w.uvrege().set_bit());
+            usb.uhwcon().modify(|_, w| w.uvrege().set_bit());
 
             // PLL configuration //
 
-            pll.pllcsr.write(|w| w.pindiv().set_bit());
+            pll.pllcsr().write(|w| w.pindiv().set_bit());
 
-            pll.pllfrq
+            pll.pllfrq()
-                .write(|w| w.pdiv().mhz96().plltm().factor_15().pllusb().set_bit());
+                .write(|w| w.pdiv().mhz96().plltm().factor_1().pllusb().set_bit());
 
             // Enable PLL //
 
-            pll.pllcsr.modify(|_, w| w.plle().set_bit());
+            pll.pllcsr().modify(|_, w| w.plle().set_bit());
 
             // Check PLL lock //
 
-            while pll.pllcsr.read().plock().bit_is_clear() {}
+            while pll.pllcsr().read().plock().bit_is_clear() {}
 
             // Enable USB interface. //
 
-            usb.usbcon
+            usb.usbcon()
                 .modify(|_, w| w.usbe().set_bit().otgpade().set_bit());
 
             // Unfreeze clock. //
 
-            usb.usbcon
+            usb.usbcon()
                 .modify(|_, w| w.frzclk().clear_bit().vbuste().set_bit());
 
             // Endpoint configuration //
@@ -123,12 +107,12 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
 
             // Set high speed and attach the USB. //
 
-            usb.udcon
+            usb.udcon()
                 .modify(|_, w| w.detach().clear_bit().lsm().clear_bit());
 
             // Interrupts. //
 
-            usb.udien
+            usb.udien()
                 .modify(|_, w| w.eorste().set_bit().sofe().set_bit());
         })
     }
@@ -136,7 +120,10 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
     fn force_reset(&self) -> UsbResult<()> {
         let set_detach = |bit| {
             free(|cs| {
-                self.usb.borrow(cs).udcon.modify(|_, w| w.detach().bit(bit));
+                self.usb
+                    .borrow(cs)
+                    .udcon()
+                    .modify(|_, w| w.detach().bit(bit));
             });
         };
 
@@ -149,7 +136,7 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
 
     fn is_stalled(&self, ep_addr: EndpointAddress) -> bool {
         free(|cs| match self.select_endpoint(cs, ep_addr.index()) {
-            Ok(_) => self.usb.borrow(cs).ueconx.read().stallrq().bit_is_set(),
+            Ok(_) => self.usb.borrow(cs).ueconx().read().stallrq().bit_is_set(),
             Err(_) => false,
         })
     }
@@ -158,13 +145,14 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
         free(|cs| {
             let usb = self.usb.borrow(cs);
 
-            let (udint, udien, usbint) = (usb.udint.read(), usb.udien.read(), usb.usbint.read());
+            let (udint, udien, usbint) =
+                (usb.udint().read(), usb.udien().read(), usb.usbint().read());
 
             if usbint.vbusti().bit_is_set() {
-                usb.usbint
+                usb.usbint()
                     .write(|w| unsafe { w.bits(USBINT_CLEAR) }.vbusti().clear_bit());
 
-                if usb.usbsta.read().vbus().bit_is_set() {
+                if usb.usbsta().read().vbus().bit_is_set() {
                     return PollResult::Resume;
                 } else {
                     return PollResult::Suspend;
@@ -184,20 +172,21 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
             }
 
             if udint.sofi().bit_is_set() {
-                usb.udint
+                usb.udint()
                     .write(|w| unsafe { w.bits(UDINT_CLEAR) }.sofi().clear_bit());
             }
 
-            if usb.usbcon.read().frzclk().bit_is_clear() {
+            if usb.usbcon().read().frzclk().bit_is_clear() {
                 let (mut ep_out, mut ep_in_complete, mut ep_setup) = (0u16, 0u16, 0u16);
                 let pending_ins = self.pending_ins.borrow(cs);
 
-                for (ep_index, _ep) in self.allocated_endpoints() {
+                for ep_index in 0usize..self.ep_table.len() {
-                    if self.select_endpoint(cs, ep_index).is_err() {
+                    if !self.ep_table[ep_index].is_allocated {
-                        break;
+                        continue;
-                    } else {
+                    }
-                        let ueintx = usb.ueintx.read();
 
+                    if self.select_endpoint(cs, ep_index).is_ok() {
+                        let ueintx = usb.ueintx().read();
                         if ueintx.rxouti().bit_is_set() {
                             ep_out |= 1 << ep_index;
                         }
@@ -211,6 +200,7 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
                         }
                     }
                 }
+
                 if ep_out | ep_in_complete | ep_setup != 0 {
                     return PollResult::Data {
                         ep_out,
@@ -232,7 +222,7 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
             let ep = &self.ep_table[ep_addr.index()];
 
             if ep.ep_type == 0 {
-                let ueintx = usb.ueintx.read();
+                let ueintx = usb.ueintx().read();
 
                 if ueintx.rxouti().bit_is_clear() && ueintx.rxstpi().bit_is_clear() {
                     return Err(UsbError::WouldBlock);
@@ -245,10 +235,10 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
                 }
 
                 for byte in &mut buf[..buf_size] {
-                    *byte = usb.uedatx.read().bits();
+                    *byte = usb.uedatx().read().bits();
                 }
 
-                usb.ueintx.write(|w| {
+                usb.ueintx().write(|w| {
                     unsafe { w.bits(RESTRICT_RW_FLAG) }
                         .rxouti()
                         .clear_bit()
@@ -258,28 +248,28 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
 
                 Ok(buf_size)
             } else {
-                if usb.ueintx.read().rxouti().bit_is_clear() {
+                if usb.ueintx().read().rxouti().bit_is_clear() {
                     return Err(UsbError::WouldBlock);
                 }
 
-                usb.ueintx
+                usb.ueintx()
                     .write(|w| unsafe { w.bits(RESTRICT_RW_FLAG) }.rxouti().clear_bit());
 
                 let mut bytes_read = 0;
 
                 for slot in buf {
-                    if usb.ueintx.read().rwal().bit_is_clear() {
+                    if usb.ueintx().read().rwal().bit_is_clear() {
                         break;
                     }
-                    *slot = usb.uedatx.read().bits();
+                    *slot = usb.uedatx().read().bits();
                     bytes_read += 1;
                 }
 
-                if usb.ueintx.read().rwal().bit_is_set() {
+                if usb.ueintx().read().rwal().bit_is_set() {
                     return Err(UsbError::BufferOverflow);
                 }
 
-                usb.ueintx
+                usb.ueintx()
                     .write(|w| unsafe { w.bits(RESTRICT_RW_FLAG) }.fifocon().clear_bit());
 
                 Ok(bytes_read)
@@ -291,7 +281,7 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
         free(|cs| {
             let usb = self.usb.borrow(cs);
 
-            usb.udint.modify(|_, w| w.eorsti().clear_bit());
+            usb.udint().modify(|_, w| w.eorsti().clear_bit());
 
             self.allocated_endpoints().for_each(|(i, _)| {
                 let _ = self.configure_endpoint(cs, i);
@@ -299,7 +289,7 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
 
             // Clear resume informations. //
 
-            usb.udint.write(|w| {
+            usb.udint().write(|w| {
                 unsafe { w.bits(UDINT_CLEAR) }
                     .wakeupi()
                     .clear_bit()
@@ -307,7 +297,7 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
                     .clear_bit()
             });
 
-            usb.udien
+            usb.udien()
                 .modify(|_, w| w.wakeupe().clear_bit().suspe().set_bit());
         })
     }
@@ -318,16 +308,16 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
 
             // PLL enable //
 
-            pll.pllcsr
+            pll.pllcsr()
                 .modify(|_, w| w.pindiv().set_bit().plle().set_bit());
 
-            while pll.pllcsr.read().plock().bit_is_clear() {}
+            while pll.pllcsr().read().plock().bit_is_clear() {}
 
             // Resuming //
 
-            usb.usbcon.modify(|_, w| w.frzclk().clear_bit());
+            usb.usbcon().modify(|_, w| w.frzclk().clear_bit());
 
-            usb.udint.write(|w| {
+            usb.udint().write(|w| {
                 unsafe { w.bits(UDINT_CLEAR) }
                     .wakeupi()
                     .clear_bit()
@@ -335,7 +325,7 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
                     .clear_bit()
             });
 
-            usb.udien
+            usb.udien()
                 .modify(|_, w| w.wakeupe().clear_bit().suspe().set_bit());
         })
     }
@@ -346,14 +336,14 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
 
             // Set address. //
 
-            usb.udaddr.modify(|_, w| w.uadd().bits(addr));
+            usb.udaddr().modify(|_, w| w.uadd().set(addr));
 
             // Note: ADDEN and UADD shall not be written at the same time.
             // (written in atmega32u4/16u4 docs)
 
             // Enable. //
 
-            usb.udaddr.modify(|_, w| w.adden().set_bit());
+            usb.udaddr().modify(|_, w| w.adden().set_bit());
         });
     }
 
@@ -361,7 +351,7 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
         free(|cs| {
             let usb = self.usb.borrow(cs);
             if self.select_endpoint(cs, ep_addr.index()).is_ok() {
-                usb.ueconx
+                usb.ueconx()
                     .modify(|_, w| w.stallrq().bit(stalled).stallrqc().bit(!stalled));
             }
         });
@@ -371,7 +361,7 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
         free(|cs| {
             let (usb, pll) = (self.usb.borrow(cs), self.pll.borrow(cs));
 
-            usb.udint.write(|w| {
+            usb.udint().write(|w| {
                 unsafe { w.bits(UDINT_CLEAR) }
                     .wakeupi()
                     .clear_bit()
@@ -381,22 +371,22 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
 
             // Suspend. //
 
-            usb.udien
+            usb.udien()
                 .modify(|_, w| w.wakeupe().set_bit().suspe().clear_bit());
 
             // Freeze clock. //
 
-            usb.usbcon.modify(|_, w| w.frzclk().set_bit());
+            usb.usbcon().modify(|_, w| w.frzclk().set_bit());
 
             // Disable PLL. //
 
-            pll.pllcsr.modify(|_, w| w.plle().clear_bit());
+            pll.pllcsr().modify(|_, w| w.plle().clear_bit());
         })
     }
 
     fn write(&self, ep_addr: EndpointAddress, buf: &[u8]) -> UsbResult<usize> {
         free(|cs| {
-            let usb = self.usb.borrow(cs);
+            let (usb, pending_ins) = (self.usb.borrow(cs), self.pending_ins.borrow(cs));
 
             self.select_endpoint(cs, ep_addr.index())?;
 
@@ -404,29 +394,25 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
 
             // Endpoint type confitions //
 
-            match ep.ep_type {
+            if usb.ueintx().read().txini().bit_is_clear() {
-                0 => {
-                    if usb.ueintx.read().txini().bit_is_clear() {
                 return Err(UsbError::WouldBlock);
             }
 
+            match ep.ep_type {
+                0 => {
                     if buf.len() > ep.get_size() {
                         return Err(UsbError::BufferOverflow);
                     }
 
                     for &byte in buf {
-                        usb.uedatx.write(|w| w.bits(byte));
+                        usb.uedatx().write(|w| w.set(byte));
                     }
 
-                    usb.ueintx
+                    usb.ueintx()
                         .write(|w| unsafe { w.bits(RESTRICT_RW_FLAG) }.txini().clear_bit());
                 }
                 _ => {
-                    if usb.ueintx.read().txini().bit_is_clear() {
+                    usb.ueintx().write(|w| {
-                        return Err(UsbError::WouldBlock);
-                    }
-
-                    usb.ueintx.write(|w| {
                         unsafe { w.bits(RESTRICT_RW_FLAG) }
                             .txini()
                             .clear_bit()
@@ -435,14 +421,14 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
                     });
 
                     for &byte in buf {
-                        if usb.ueintx.read().rwal().bit_is_set() {
+                        if usb.ueintx().read().rwal().bit_is_set() {
-                            usb.uedatx.write(|w| w.bits(byte));
+                            usb.uedatx().write(|w| w.set(byte));
                         } else {
                             return Err(UsbError::BufferOverflow);
                         }
                     }
 
-                    usb.ueintx.write(|w| {
+                    usb.ueintx().write(|w| {
                         unsafe { w.bits(RESTRICT_RW_FLAG) }
                             .rxouti()
                             .clear_bit()
@@ -452,7 +438,6 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
                 }
             };
 
-            let pending_ins = self.pending_ins.borrow(cs);
             pending_ins.set(pending_ins.get() | 1 << ep_addr.index());
 
             Ok(buf.len())

src/types/usb_device.rs

@@ -2,13 +2,13 @@ use core::cell::Cell;
 
 use avr_device::{
     atmega32u4::{PLL, USB_DEVICE},
-    interrupt::{CriticalSection, Mutex},
+    interrupt::{free, CriticalSection, Mutex},
 };
 use usb_device::{bus::UsbBusAllocator, endpoint::EndpointType, UsbDirection, UsbError};
 
 #[allow(unused)]
 #[derive(Default, Copy, Clone)]
-pub(crate) struct USBEndpoint {
+pub struct USBEndpoint {
     pub(crate) is_allocated: bool,
     pub(crate) size: u8,
     pub(crate) ep_type: u8,
@@ -71,8 +71,8 @@ impl USBEndpoint {
 pub struct UsbDevice<const L: usize> {
     pub(crate) pll: Mutex<PLL>,
     pub(crate) usb: Mutex<USB_DEVICE>,
-    pub(crate) ep_table: [USBEndpoint; L],
     pub(crate) pending_ins: Mutex<Cell<u8>>,
+    pub(crate) ep_table: [USBEndpoint; L],
     pub(crate) dpram_already_used: u16,
 }
 
@@ -80,6 +80,7 @@ pub(crate) const MAX_ENDPOINTS: usize = 7;
 pub(crate) const DPRAM_SIZE: u16 = 832;
 pub(crate) const ENDPOINTS_ALLOC_LAYOUT: [u16; MAX_ENDPOINTS] = [64, 256, 64, 64, 64, 64, 64];
 pub(crate) const ONE_MS_16_MGHZ: u32 = 16000;
+pub(crate) const ENDPOINT_EPNUM_MASK: u8 = 0x07;
 
 impl<const L: usize> UsbDevice<L> {
     #[inline]
@@ -87,8 +88,8 @@ impl<const L: usize> UsbDevice<L> {
         UsbBusAllocator::new(Self {
             pll: Mutex::new(pll),
             usb: Mutex::new(usb),
+            pending_ins: Mutex::new(Cell::new(0)),
             ep_table: [USBEndpoint::default(); L],
-            pending_ins: Mutex::new(Cell::new(0u8)),
             dpram_already_used: 0,
         })
     }
@@ -116,21 +117,22 @@ impl<const L: usize> UsbDevice<L> {
         cs: CriticalSection<'_>,
         endpoint_index: usize,
     ) -> Result<(), UsbError> {
-        let usb = self.usb.borrow(cs);
-        let endpoint_index = endpoint_index as u8;
-
         if endpoint_index >= 7 {
             return Err(UsbError::InvalidEndpoint);
         }
 
-        if usb.usbcon.read().frzclk().bit_is_set() {
+        let usb = self.usb.borrow(cs);
+
+        if usb.usbcon().read().frzclk().bit_is_set() {
             return Err(UsbError::InvalidState);
         }
 
-        usb.uenum.write(|w| w.bits(endpoint_index));
+        let endpoint_index = (endpoint_index as u8) & ENDPOINT_EPNUM_MASK;
 
-        if usb.uenum.read().bits() & 7 /* 0b111 */ != endpoint_index {
+        usb.uenum().write(|w| unsafe { w.bits(endpoint_index) });
-            return Err(UsbError::InvalidEndpoint);
+
+        if usb.uenum().read().bits() & ENDPOINT_EPNUM_MASK != endpoint_index {
+            return Err(UsbError::InvalidState);
         }
 
         Ok(())
@@ -142,25 +144,27 @@ impl<const L: usize> UsbDevice<L> {
         endpoint_index: usize,
     ) -> Result<(), UsbError> {
         let usb = self.usb.borrow(cs);
-        let current_endpoint = self.ep_table[endpoint_index];
 
-        match self.select_endpoint(cs, endpoint_index) {
+        self.select_endpoint(cs, endpoint_index)?;
-            Ok(_) => {
+
+        let current_endpoint = &self.ep_table[endpoint_index];
+
+        usb.uecfg1x().modify(|_, w| w.alloc().clear_bit());
+
         // Enable endpoint. //
 
-                usb.ueconx.modify(|_, w| w.epen().set_bit());
+        usb.ueconx().modify(|_, w| w.epen().set_bit());
-                usb.uecfg1x.modify(|_, w| w.alloc().clear_bit());
 
         // Set markered endpoint parameters to uecfg0x/1x register. //
 
-                usb.uecfg0x.modify(|_, w| {
+        usb.uecfg0x().write(|w| unsafe {
             w.epdir()
                 .bit(current_endpoint.ep_dir)
                 .eptype()
                 .bits(current_endpoint.ep_type)
         });
 
-                usb.uecfg1x.modify(|_, w| {
+        usb.uecfg1x().write(|w| unsafe {
             w.epbk()
                 .bits(0)
                 .epsize()
@@ -169,23 +173,22 @@ impl<const L: usize> UsbDevice<L> {
                 .set_bit()
         });
 
-                if usb.uesta0x.read().cfgok().bit_is_clear() {
+        usb.uecfg1x().modify(|_, w| w.alloc().set_bit());
+
+        if usb.uesta0x().read().cfgok().bit_is_clear() {
             Err(UsbError::EndpointMemoryOverflow)
         } else {
-                    usb.ueienx
+            usb.ueienx()
                 .modify(|_, w| w.rxoute().set_bit().rxstpe().set_bit());
 
             Ok(())
         }
     }
-            Err(exception) => Err(exception),
-        }
-    }
 
     #[inline(always)]
     pub(crate) fn get_size(&self, cs: CriticalSection<'_>) -> usize {
         let usb = self.usb.borrow(cs);
 
-        (((usb.uebchx.read().bits() as u16) << 8) | (usb.uebclx.read().bits() as u16)).into()
+        (((usb.uebchx().read().bits() as u16) << 8) | (usb.uebclx().read().bits() as u16)).into()
     }
 }