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12104cdc0b
| Author | SHA1 | Date | |
|---|---|---|---|
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12104cdc0b |
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+2
-4
@@ -1,5 +1,5 @@
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[package]
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[package]
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name = "usb-avr"
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name = "usb_avr"
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version = "0.1.0"
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version = "0.1.0"
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edition = "2021"
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edition = "2021"
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@@ -11,11 +11,9 @@ embedded-hal = "1.0"
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usb-device = "0.3.2"
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usb-device = "0.3.2"
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[dependencies.avr-device]
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[dependencies.avr-device]
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version = "0.8.1"
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version = "0.5.4"
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features = ["atmega32u4"]
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features = ["atmega32u4"]
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# The latest releases of `proc-macro2` do not support the rust toolchain that
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# The latest releases of `proc-macro2` do not support the rust toolchain that
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# we use. Thus, we must fix this dependency to an older version where our
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# we use. Thus, we must fix this dependency to an older version where our
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# toolchain is still supported. See https://github.com/Rahix/avr-hal/issues/537
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# toolchain is still supported. See https://github.com/Rahix/avr-hal/issues/537
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# [build-dependencies.proc-macro2]
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# version = "=1.0.79"
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@@ -0,0 +1,4 @@
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[toolchain]
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channel = "nightly-2024-06-13"
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components = [ "rust-src" ]
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profile = "complete"
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+124
-114
@@ -6,7 +6,7 @@ use avr_device::{asm::delay_cycles, interrupt::free};
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use usb_device::{
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use usb_device::{
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bus::{PollResult, UsbBus},
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bus::{PollResult, UsbBus},
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endpoint::{EndpointAddress, EndpointType},
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endpoint::{EndpointAddress, EndpointType},
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Result as UsbResult, UsbDirection as Dir, UsbError,
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Result as UsbResult, UsbDirection, UsbError,
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};
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};
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mod types;
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mod types;
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@@ -14,24 +14,25 @@ pub use types::*;
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use types::{DPRAM_SIZE, ENDPOINTS_ALLOC_LAYOUT, ONE_MS_16_MGHZ};
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use types::{DPRAM_SIZE, ENDPOINTS_ALLOC_LAYOUT, ONE_MS_16_MGHZ};
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const RESTRICT_RW_FLAG: u8 = !(1 << 5);
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const USBINT_CLEAR: u8 = 1 << 0;
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const UDINT_CLEAR: u8 = !(1 << 7 | 1 << 1);
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impl<const L: usize> UsbBus for UsbDevice<L> {
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impl<const L: usize> UsbBus for UsbDevice<L> {
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fn alloc_ep(
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fn alloc_ep(
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&mut self,
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&mut self,
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ep_dir: Dir,
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ep_dir: UsbDirection,
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ep_addr: Option<EndpointAddress>,
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ep_addr: Option<EndpointAddress>,
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ep_type: EndpointType,
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ep_type: EndpointType,
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max_packet_size: u16,
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max_packet_size: u16,
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_interval: u8,
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_interval: u8,
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) -> UsbResult<EndpointAddress> {
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) -> UsbResult<EndpointAddress> {
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let target_ep_index = match ep_addr {
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// Handle first endpoint. //
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Some(ep) if ep.index() == 0 && ep_dir == Dir::In => {
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free(|_cs| {
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return ep_addr.ok_or(UsbError::InvalidState);
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if ep_addr == Some(EndpointAddress::from_parts(0, UsbDirection::In)) {
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} // TODO: rewrite to bind pattern with @
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Ok(ep_addr.unwrap())
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Some(ep) if !self.ep_table[ep.index()].is_allocated => Ok(ep),
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} else {
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let address = match ep_addr {
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// If current endpoint doesn't allocated, assign ep_addr to variable. //
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Some(addr) if !self.ep_table[addr.index()].is_allocated => addr,
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// If ep_aadr not provided, or current endpoint is allocated, try to find next free endpoint, otherwise return UsbError. //
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_ => {
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_ => {
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let index = self
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let index = self
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.ep_table
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.ep_table
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@@ -39,31 +40,44 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
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.enumerate()
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.enumerate()
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.skip(1)
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.skip(1)
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.find(|(index, ep)| {
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.find(|(index, ep)| {
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!ep.is_allocated && max_packet_size <= ENDPOINTS_ALLOC_LAYOUT[*index]
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!ep.is_allocated
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&& max_packet_size <= ENDPOINTS_ALLOC_LAYOUT[*index]
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})
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})
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.map(|(index, _)| index)
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.ok_or(UsbError::EndpointOverflow)?
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.ok_or(UsbError::EndpointOverflow)?;
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.0;
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Ok(EndpointAddress::from_parts(index, ep_dir))
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EndpointAddress::from_parts(index, ep_dir)
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}
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}
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}?;
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};
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// Select endpoint info by address index. //
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let target_endpoint = &mut self.ep_table[address.index()];
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// Get power of two number of endpoint size. //
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let ep_size = max(8, max_packet_size.next_power_of_two());
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let ep_size = max(8, max_packet_size.next_power_of_two());
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// Endpoint allocation marker. //
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if DPRAM_SIZE - self.dpram_already_used < ep_size {
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if DPRAM_SIZE - self.dpram_already_used < ep_size {
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return Err(UsbError::EndpointMemoryOverflow);
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Err(UsbError::EndpointMemoryOverflow)
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}
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} else {
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// Set endpoint parameters. //
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let target_ep = &mut self.ep_table[target_ep_index.index()];
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target_endpoint.set_dir(ep_dir);
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target_endpoint.set_type(ep_type);
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target_endpoint.set_size(ep_size)?;
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target_ep.set_dir(ep_dir);
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// Add used dpram memory. //
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target_ep.set_type(ep_type);
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target_ep.set_size(ep_size)?;
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target_ep.is_allocated = true;
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target_endpoint.is_allocated = true;
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self.dpram_already_used += ep_size;
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self.dpram_already_used += ep_size;
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Ok(target_ep_index)
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Ok(address)
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}
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}
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})
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}
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}
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fn enable(&mut self) {
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fn enable(&mut self) {
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@@ -72,71 +86,70 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
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// Enable USB pads regulators. //
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// Enable USB pads regulators. //
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usb.uhwcon().modify(|_, w| w.uvrege().set_bit());
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usb.uhwcon.modify(|_, w| w.uvrege().set_bit());
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// PLL configuration //
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// PLL configuration //
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pll.pllcsr().write(|w| w.pindiv().set_bit());
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pll.pllcsr.write(|w| w.pindiv().set_bit());
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pll.pllfrq()
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pll.pllfrq
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.write(|w| w.pdiv().mhz96().plltm().factor_1().pllusb().set_bit());
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.write(|w| w.pdiv().mhz96().plltm().factor_15().pllusb().set_bit());
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// Enable PLL //
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// Enable PLL //
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pll.pllcsr().modify(|_, w| w.plle().set_bit());
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pll.pllcsr.modify(|_, w| w.plle().set_bit());
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// Check PLL lock //
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// Check PLL lock //
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while pll.pllcsr().read().plock().bit_is_clear() {}
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while pll.pllcsr.read().plock().bit_is_clear() {}
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// Enable USB interface. //
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// Enable USB interface. //
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usb.usbcon()
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usb.usbcon
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.modify(|_, w| w.usbe().set_bit().otgpade().set_bit());
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.modify(|_, w| w.usbe().set_bit().otgpade().set_bit());
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// Unfreeze clock. //
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// Unfreeze clock. //
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usb.usbcon()
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usb.usbcon
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.modify(|_, w| w.frzclk().clear_bit().vbuste().set_bit());
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.modify(|_, w| w.frzclk().clear_bit().vbuste().set_bit());
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|
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// Endpoint configuration //
|
// Endpoint configuration //
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|
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self.allocated_endpoints().for_each(|(i, _ep)| {
|
self.allocated_endpoints().for_each(|(i, _ep)| {
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let _ = self.configure_endpoint(cs, i);
|
self.configure_endpoint(cs, i).unwrap();
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});
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});
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|
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// Set high speed and attach the USB. //
|
// Set high speed and attach the USB. //
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|
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usb.udcon()
|
usb.udcon
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.modify(|_, w| w.detach().clear_bit().lsm().clear_bit());
|
.modify(|_, w| w.detach().clear_bit().lsm().clear_bit());
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|
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// Interrupts. //
|
// Interrupts. //
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||||||
|
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usb.udien()
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usb.udien
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.modify(|_, w| w.eorste().set_bit().sofe().set_bit());
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.modify(|_, w| w.eorste().set_bit().sofe().set_bit());
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})
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})
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}
|
}
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|
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fn force_reset(&self) -> UsbResult<()> {
|
fn force_reset(&self) -> UsbResult<()> {
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let set_detach = |bit| {
|
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free(|cs| {
|
free(|cs| {
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self.usb
|
let usbcon = &self.usb.borrow(cs).usbcon;
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.borrow(cs)
|
usbcon.modify(|_, w| w.usbe().set_bit());
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.udcon()
|
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.modify(|_, w| w.detach().bit(bit));
|
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});
|
});
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};
|
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|
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set_detach(true);
|
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delay_cycles(ONE_MS_16_MGHZ);
|
delay_cycles(ONE_MS_16_MGHZ);
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set_detach(false);
|
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||||||
|
free(|cs| {
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|
let usbcon = &self.usb.borrow(cs).usbcon;
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|
usbcon.modify(|_, w| w.usbe().set_bit());
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|
});
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|
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Ok(())
|
Ok(())
|
||||||
}
|
}
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|
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fn is_stalled(&self, ep_addr: EndpointAddress) -> bool {
|
fn is_stalled(&self, ep_addr: EndpointAddress) -> bool {
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free(|cs| match self.select_endpoint(cs, ep_addr.index()) {
|
free(|cs| match self.select_endpoint(cs, ep_addr.index()) {
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Ok(_) => self.usb.borrow(cs).ueconx().read().stallrq().bit_is_set(),
|
Ok(_) => self.usb.borrow(cs).ueconx.read().stallrq().bit_is_set(),
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Err(_) => false,
|
Err(_) => false,
|
||||||
})
|
})
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}
|
}
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@@ -145,14 +158,12 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
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free(|cs| {
|
free(|cs| {
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let usb = self.usb.borrow(cs);
|
let usb = self.usb.borrow(cs);
|
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|
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let (udint, udien, usbint) =
|
let (udint, udien, usbint) = (usb.udint.read(), usb.udien.read(), usb.usbint.read());
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(usb.udint().read(), usb.udien().read(), usb.usbint().read());
|
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|
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if usbint.vbusti().bit_is_set() {
|
if usbint.vbusti().bit_is_set() {
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usb.usbint()
|
usb.usbint
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.write(|w| unsafe { w.bits(USBINT_CLEAR) }.vbusti().clear_bit());
|
.write(|w| unsafe { w.bits(0x01) }.vbusti().clear_bit());
|
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|
if usb.usbsta.read().vbus().bit_is_set() {
|
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if usb.usbsta().read().vbus().bit_is_set() {
|
|
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return PollResult::Resume;
|
return PollResult::Resume;
|
||||||
} else {
|
} else {
|
||||||
return PollResult::Suspend;
|
return PollResult::Suspend;
|
||||||
@@ -172,21 +183,20 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
|
|||||||
}
|
}
|
||||||
|
|
||||||
if udint.sofi().bit_is_set() {
|
if udint.sofi().bit_is_set() {
|
||||||
usb.udint()
|
usb.udint
|
||||||
.write(|w| unsafe { w.bits(UDINT_CLEAR) }.sofi().clear_bit());
|
.write(|w| unsafe { w.bits(0x7d) }.sofi().clear_bit());
|
||||||
}
|
}
|
||||||
|
|
||||||
if usb.usbcon().read().frzclk().bit_is_clear() {
|
if usb.usbcon.read().frzclk().bit_is_clear() {
|
||||||
let (mut ep_out, mut ep_in_complete, mut ep_setup) = (0u16, 0u16, 0u16);
|
let (mut ep_out, mut ep_in_complete, mut ep_setup) = (0u16, 0u16, 0u16);
|
||||||
let pending_ins = self.pending_ins.borrow(cs);
|
let pending_ins = self.pending_ins.borrow(cs);
|
||||||
|
|
||||||
for ep_index in 0usize..self.ep_table.len() {
|
for (ep_index, _ep) in self.allocated_endpoints() {
|
||||||
if !self.ep_table[ep_index].is_allocated {
|
if self.select_endpoint(cs, ep_index).is_err() {
|
||||||
continue;
|
break;
|
||||||
}
|
} else {
|
||||||
|
let ueintx = usb.ueintx.read();
|
||||||
|
|
||||||
if self.select_endpoint(cs, ep_index).is_ok() {
|
|
||||||
let ueintx = usb.ueintx().read();
|
|
||||||
if ueintx.rxouti().bit_is_set() {
|
if ueintx.rxouti().bit_is_set() {
|
||||||
ep_out |= 1 << ep_index;
|
ep_out |= 1 << ep_index;
|
||||||
}
|
}
|
||||||
@@ -200,7 +210,6 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
if ep_out | ep_in_complete | ep_setup != 0 {
|
if ep_out | ep_in_complete | ep_setup != 0 {
|
||||||
return PollResult::Data {
|
return PollResult::Data {
|
||||||
ep_out,
|
ep_out,
|
||||||
@@ -217,29 +226,29 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
|
|||||||
free(|cs| {
|
free(|cs| {
|
||||||
let usb = self.usb.borrow(cs);
|
let usb = self.usb.borrow(cs);
|
||||||
|
|
||||||
self.select_endpoint(cs, ep_addr.index())?;
|
if let Err(error) = self.select_endpoint(cs, ep_addr.index()) {
|
||||||
|
Err(error)
|
||||||
|
} else {
|
||||||
let ep = &self.ep_table[ep_addr.index()];
|
let ep = &self.ep_table[ep_addr.index()];
|
||||||
|
|
||||||
if ep.ep_type == 0 {
|
if ep.ep_type == 0 {
|
||||||
let ueintx = usb.ueintx().read();
|
let ueintx = usb.ueintx.read();
|
||||||
|
|
||||||
if ueintx.rxouti().bit_is_clear() && ueintx.rxstpi().bit_is_clear() {
|
if ueintx.rxouti().bit_is_clear() && ueintx.rxstpi().bit_is_clear() {
|
||||||
return Err(UsbError::WouldBlock);
|
return Err(UsbError::WouldBlock);
|
||||||
}
|
}
|
||||||
|
|
||||||
let buf_size = self.get_size(cs);
|
let buf_size = self.get_size(cs);
|
||||||
|
|
||||||
if buf.len() < buf_size {
|
if buf.len() < buf_size {
|
||||||
return Err(UsbError::BufferOverflow);
|
return Err(UsbError::BufferOverflow);
|
||||||
}
|
}
|
||||||
|
|
||||||
for byte in &mut buf[..buf_size] {
|
for byte in &mut buf[..buf_size] {
|
||||||
*byte = usb.uedatx().read().bits();
|
*byte = usb.uedatx.read().bits();
|
||||||
}
|
}
|
||||||
|
|
||||||
usb.ueintx().write(|w| {
|
usb.ueintx.write(|w| {
|
||||||
unsafe { w.bits(RESTRICT_RW_FLAG) }
|
unsafe { w.bits(0xdf) }
|
||||||
.rxouti()
|
.rxouti()
|
||||||
.clear_bit()
|
.clear_bit()
|
||||||
.rxstpi()
|
.rxstpi()
|
||||||
@@ -248,32 +257,30 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
|
|||||||
|
|
||||||
Ok(buf_size)
|
Ok(buf_size)
|
||||||
} else {
|
} else {
|
||||||
if usb.ueintx().read().rxouti().bit_is_clear() {
|
if usb.ueintx.read().rxouti().bit_is_clear() {
|
||||||
return Err(UsbError::WouldBlock);
|
return Err(UsbError::WouldBlock);
|
||||||
}
|
}
|
||||||
|
usb.ueintx
|
||||||
usb.ueintx()
|
.write(|w| unsafe { w.bits(0xdf) }.rxouti().clear_bit());
|
||||||
.write(|w| unsafe { w.bits(RESTRICT_RW_FLAG) }.rxouti().clear_bit());
|
|
||||||
|
|
||||||
let mut bytes_read = 0;
|
let mut bytes_read = 0;
|
||||||
|
|
||||||
for slot in buf {
|
for slot in buf {
|
||||||
if usb.ueintx().read().rwal().bit_is_clear() {
|
if usb.ueintx.read().rwal().bit_is_clear() {
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
*slot = usb.uedatx().read().bits();
|
*slot = usb.uedatx.read().bits();
|
||||||
bytes_read += 1;
|
bytes_read += 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
if usb.ueintx().read().rwal().bit_is_set() {
|
if usb.ueintx.read().rwal().bit_is_set() {
|
||||||
return Err(UsbError::BufferOverflow);
|
return Err(UsbError::BufferOverflow);
|
||||||
}
|
}
|
||||||
|
|
||||||
usb.ueintx()
|
usb.ueintx
|
||||||
.write(|w| unsafe { w.bits(RESTRICT_RW_FLAG) }.fifocon().clear_bit());
|
.write(|w| unsafe { w.bits(0xdf) }.fifocon().clear_bit());
|
||||||
|
|
||||||
Ok(bytes_read)
|
Ok(bytes_read)
|
||||||
}
|
}
|
||||||
|
}
|
||||||
})
|
})
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -281,23 +288,23 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
|
|||||||
free(|cs| {
|
free(|cs| {
|
||||||
let usb = self.usb.borrow(cs);
|
let usb = self.usb.borrow(cs);
|
||||||
|
|
||||||
usb.udint().modify(|_, w| w.eorsti().clear_bit());
|
usb.udint.modify(|_, w| w.eorsti().clear_bit());
|
||||||
|
|
||||||
self.allocated_endpoints().for_each(|(i, _)| {
|
self.allocated_endpoints().for_each(|(i, _)| {
|
||||||
let _ = self.configure_endpoint(cs, i);
|
self.configure_endpoint(cs, i).unwrap();
|
||||||
});
|
});
|
||||||
|
|
||||||
// Clear resume informations. //
|
// Clear resume informations. //
|
||||||
|
|
||||||
usb.udint().write(|w| {
|
usb.udint.write(|w| {
|
||||||
unsafe { w.bits(UDINT_CLEAR) }
|
unsafe { w.bits(0x7d) }
|
||||||
.wakeupi()
|
.wakeupi()
|
||||||
.clear_bit()
|
.clear_bit()
|
||||||
.suspi()
|
.suspi()
|
||||||
.clear_bit()
|
.clear_bit()
|
||||||
});
|
});
|
||||||
|
|
||||||
usb.udien()
|
usb.udien
|
||||||
.modify(|_, w| w.wakeupe().clear_bit().suspe().set_bit());
|
.modify(|_, w| w.wakeupe().clear_bit().suspe().set_bit());
|
||||||
})
|
})
|
||||||
}
|
}
|
||||||
@@ -308,24 +315,24 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
|
|||||||
|
|
||||||
// PLL enable //
|
// PLL enable //
|
||||||
|
|
||||||
pll.pllcsr()
|
pll.pllcsr
|
||||||
.modify(|_, w| w.pindiv().set_bit().plle().set_bit());
|
.modify(|_, w| w.pindiv().set_bit().plle().set_bit());
|
||||||
|
|
||||||
while pll.pllcsr().read().plock().bit_is_clear() {}
|
while pll.pllcsr.read().plock().bit_is_clear() {}
|
||||||
|
|
||||||
// Resuming //
|
// Resuming //
|
||||||
|
|
||||||
usb.usbcon().modify(|_, w| w.frzclk().clear_bit());
|
usb.usbcon.modify(|_, w| w.frzclk().clear_bit());
|
||||||
|
|
||||||
usb.udint().write(|w| {
|
usb.udint.write(|w| {
|
||||||
unsafe { w.bits(UDINT_CLEAR) }
|
unsafe { w.bits(0x7d) }
|
||||||
.wakeupi()
|
.wakeupi()
|
||||||
.clear_bit()
|
.clear_bit()
|
||||||
.suspi()
|
.suspi()
|
||||||
.clear_bit()
|
.clear_bit()
|
||||||
});
|
});
|
||||||
|
|
||||||
usb.udien()
|
usb.udien
|
||||||
.modify(|_, w| w.wakeupe().clear_bit().suspe().set_bit());
|
.modify(|_, w| w.wakeupe().clear_bit().suspe().set_bit());
|
||||||
})
|
})
|
||||||
}
|
}
|
||||||
@@ -336,14 +343,14 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
|
|||||||
|
|
||||||
// Set address. //
|
// Set address. //
|
||||||
|
|
||||||
usb.udaddr().modify(|_, w| w.uadd().set(addr));
|
usb.udaddr.modify(|_, w| w.uadd().bits(addr));
|
||||||
|
|
||||||
// Note: ADDEN and UADD shall not be written at the same time.
|
// Note: ADDEN and UADD shall not be written at the same time.
|
||||||
// (written in atmega32u4/16u4 docs)
|
// (written in atmega32u4/16u4 docs)
|
||||||
|
|
||||||
// Enable. //
|
// Enable. //
|
||||||
|
|
||||||
usb.udaddr().modify(|_, w| w.adden().set_bit());
|
usb.udaddr.modify(|_, w| w.adden().set_bit());
|
||||||
});
|
});
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -351,7 +358,7 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
|
|||||||
free(|cs| {
|
free(|cs| {
|
||||||
let usb = self.usb.borrow(cs);
|
let usb = self.usb.borrow(cs);
|
||||||
if self.select_endpoint(cs, ep_addr.index()).is_ok() {
|
if self.select_endpoint(cs, ep_addr.index()).is_ok() {
|
||||||
usb.ueconx()
|
usb.ueconx
|
||||||
.modify(|_, w| w.stallrq().bit(stalled).stallrqc().bit(!stalled));
|
.modify(|_, w| w.stallrq().bit(stalled).stallrqc().bit(!stalled));
|
||||||
}
|
}
|
||||||
});
|
});
|
||||||
@@ -361,8 +368,8 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
|
|||||||
free(|cs| {
|
free(|cs| {
|
||||||
let (usb, pll) = (self.usb.borrow(cs), self.pll.borrow(cs));
|
let (usb, pll) = (self.usb.borrow(cs), self.pll.borrow(cs));
|
||||||
|
|
||||||
usb.udint().write(|w| {
|
usb.udint.write(|w| {
|
||||||
unsafe { w.bits(UDINT_CLEAR) }
|
unsafe { w.bits(0x7d) }
|
||||||
.wakeupi()
|
.wakeupi()
|
||||||
.clear_bit()
|
.clear_bit()
|
||||||
.suspi()
|
.suspi()
|
||||||
@@ -371,49 +378,51 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
|
|||||||
|
|
||||||
// Suspend. //
|
// Suspend. //
|
||||||
|
|
||||||
usb.udien()
|
usb.udien
|
||||||
.modify(|_, w| w.wakeupe().set_bit().suspe().clear_bit());
|
.modify(|_, w| w.wakeupe().set_bit().suspe().clear_bit());
|
||||||
|
|
||||||
// Freeze clock. //
|
// Freeze clock. //
|
||||||
|
|
||||||
usb.usbcon().modify(|_, w| w.frzclk().set_bit());
|
usb.usbcon.modify(|_, w| w.frzclk().set_bit());
|
||||||
|
|
||||||
// Disable PLL. //
|
// Disable PLL. //
|
||||||
|
|
||||||
pll.pllcsr().modify(|_, w| w.plle().clear_bit());
|
pll.pllcsr.modify(|_, w| w.plle().clear_bit());
|
||||||
})
|
})
|
||||||
}
|
}
|
||||||
|
|
||||||
fn write(&self, ep_addr: EndpointAddress, buf: &[u8]) -> UsbResult<usize> {
|
fn write(&self, ep_addr: EndpointAddress, buf: &[u8]) -> UsbResult<usize> {
|
||||||
free(|cs| {
|
free(|cs| {
|
||||||
let (usb, pending_ins) = (self.usb.borrow(cs), self.pending_ins.borrow(cs));
|
let usb = self.usb.borrow(cs);
|
||||||
|
|
||||||
self.select_endpoint(cs, ep_addr.index())?;
|
|
||||||
|
|
||||||
|
if let Err(error) = self.select_endpoint(cs, ep_addr.index()) {
|
||||||
|
Err(error)
|
||||||
|
} else {
|
||||||
let ep = &self.ep_table[ep_addr.index()];
|
let ep = &self.ep_table[ep_addr.index()];
|
||||||
|
|
||||||
// Endpoint type confitions //
|
// Endpoint type confitions //
|
||||||
|
|
||||||
if usb.ueintx().read().txini().bit_is_clear() {
|
if ep.ep_type == 0 {
|
||||||
|
if usb.ueintx.read().txini().bit_is_clear() {
|
||||||
return Err(UsbError::WouldBlock);
|
return Err(UsbError::WouldBlock);
|
||||||
}
|
}
|
||||||
|
|
||||||
match ep.ep_type {
|
|
||||||
0 => {
|
|
||||||
if buf.len() > ep.get_size() {
|
if buf.len() > ep.get_size() {
|
||||||
return Err(UsbError::BufferOverflow);
|
return Err(UsbError::BufferOverflow);
|
||||||
}
|
}
|
||||||
|
|
||||||
for &byte in buf {
|
for &byte in buf {
|
||||||
usb.uedatx().write(|w| w.set(byte));
|
usb.uedatx.write(|w| w.bits(byte));
|
||||||
}
|
}
|
||||||
|
|
||||||
usb.ueintx()
|
usb.ueintx
|
||||||
.write(|w| unsafe { w.bits(RESTRICT_RW_FLAG) }.txini().clear_bit());
|
.write(|w| unsafe { w.bits(0xdf) }.txini().clear_bit());
|
||||||
|
} else {
|
||||||
|
if usb.ueintx.read().txini().bit_is_clear() {
|
||||||
|
return Err(UsbError::WouldBlock);
|
||||||
}
|
}
|
||||||
_ => {
|
usb.ueintx.write(|w| {
|
||||||
usb.ueintx().write(|w| {
|
unsafe { w.bits(0xdf) }
|
||||||
unsafe { w.bits(RESTRICT_RW_FLAG) }
|
|
||||||
.txini()
|
.txini()
|
||||||
.clear_bit()
|
.clear_bit()
|
||||||
.rxouti()
|
.rxouti()
|
||||||
@@ -421,26 +430,27 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
|
|||||||
});
|
});
|
||||||
|
|
||||||
for &byte in buf {
|
for &byte in buf {
|
||||||
if usb.ueintx().read().rwal().bit_is_set() {
|
if usb.ueintx.read().rwal().bit_is_set() {
|
||||||
usb.uedatx().write(|w| w.set(byte));
|
usb.uedatx.write(|w| w.bits(byte));
|
||||||
} else {
|
} else {
|
||||||
return Err(UsbError::BufferOverflow);
|
return Err(UsbError::BufferOverflow);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
usb.ueintx().write(|w| {
|
usb.ueintx.write(|w| {
|
||||||
unsafe { w.bits(RESTRICT_RW_FLAG) }
|
unsafe { w.bits(0xdf) }
|
||||||
.rxouti()
|
.rxouti()
|
||||||
.clear_bit()
|
.clear_bit()
|
||||||
.fifocon()
|
.fifocon()
|
||||||
.clear_bit()
|
.clear_bit()
|
||||||
});
|
});
|
||||||
}
|
}
|
||||||
};
|
|
||||||
|
|
||||||
|
let pending_ins = self.pending_ins.borrow(cs);
|
||||||
pending_ins.set(pending_ins.get() | 1 << ep_addr.index());
|
pending_ins.set(pending_ins.get() | 1 << ep_addr.index());
|
||||||
|
|
||||||
Ok(buf.len())
|
Ok(buf.len())
|
||||||
|
}
|
||||||
})
|
})
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
+30
-43
@@ -2,13 +2,13 @@ use core::cell::Cell;
|
|||||||
|
|
||||||
use avr_device::{
|
use avr_device::{
|
||||||
atmega32u4::{PLL, USB_DEVICE},
|
atmega32u4::{PLL, USB_DEVICE},
|
||||||
interrupt::{free, CriticalSection, Mutex},
|
interrupt::{CriticalSection, Mutex},
|
||||||
};
|
};
|
||||||
use usb_device::{bus::UsbBusAllocator, endpoint::EndpointType, UsbDirection, UsbError};
|
use usb_device::{bus::UsbBusAllocator, endpoint::EndpointType, UsbDirection, UsbError};
|
||||||
|
|
||||||
#[allow(unused)]
|
#[allow(unused)]
|
||||||
#[derive(Default, Copy, Clone)]
|
#[derive(Default, Copy, Clone)]
|
||||||
pub struct USBEndpoint {
|
pub(crate) struct USBEndpoint {
|
||||||
pub(crate) is_allocated: bool,
|
pub(crate) is_allocated: bool,
|
||||||
pub(crate) size: u8,
|
pub(crate) size: u8,
|
||||||
pub(crate) ep_type: u8,
|
pub(crate) ep_type: u8,
|
||||||
@@ -71,8 +71,8 @@ impl USBEndpoint {
|
|||||||
pub struct UsbDevice<const L: usize> {
|
pub struct UsbDevice<const L: usize> {
|
||||||
pub(crate) pll: Mutex<PLL>,
|
pub(crate) pll: Mutex<PLL>,
|
||||||
pub(crate) usb: Mutex<USB_DEVICE>,
|
pub(crate) usb: Mutex<USB_DEVICE>,
|
||||||
pub(crate) pending_ins: Mutex<Cell<u8>>,
|
|
||||||
pub(crate) ep_table: [USBEndpoint; L],
|
pub(crate) ep_table: [USBEndpoint; L],
|
||||||
|
pub(crate) pending_ins: Mutex<Cell<u8>>,
|
||||||
pub(crate) dpram_already_used: u16,
|
pub(crate) dpram_already_used: u16,
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -80,31 +80,27 @@ pub(crate) const MAX_ENDPOINTS: usize = 7;
|
|||||||
pub(crate) const DPRAM_SIZE: u16 = 832;
|
pub(crate) const DPRAM_SIZE: u16 = 832;
|
||||||
pub(crate) const ENDPOINTS_ALLOC_LAYOUT: [u16; MAX_ENDPOINTS] = [64, 256, 64, 64, 64, 64, 64];
|
pub(crate) const ENDPOINTS_ALLOC_LAYOUT: [u16; MAX_ENDPOINTS] = [64, 256, 64, 64, 64, 64, 64];
|
||||||
pub(crate) const ONE_MS_16_MGHZ: u32 = 16000;
|
pub(crate) const ONE_MS_16_MGHZ: u32 = 16000;
|
||||||
pub(crate) const ENDPOINT_EPNUM_MASK: u8 = 0x07;
|
|
||||||
|
|
||||||
impl<const L: usize> UsbDevice<L> {
|
impl<const L: usize> UsbDevice<L> {
|
||||||
|
#[inline]
|
||||||
|
pub(crate) fn get_size(&self, cs: CriticalSection<'_>) -> usize {
|
||||||
|
let usb = self.usb.borrow(cs);
|
||||||
|
|
||||||
|
(((usb.uebchx.read().bits() as u16) << 8) | (usb.uebclx.read().bits() as u16)).into()
|
||||||
|
}
|
||||||
|
|
||||||
#[inline]
|
#[inline]
|
||||||
pub fn new(pll: PLL, usb: USB_DEVICE) -> UsbBusAllocator<Self> {
|
pub fn new(pll: PLL, usb: USB_DEVICE) -> UsbBusAllocator<Self> {
|
||||||
UsbBusAllocator::new(Self {
|
UsbBusAllocator::new(Self {
|
||||||
pll: Mutex::new(pll),
|
pll: Mutex::new(pll),
|
||||||
usb: Mutex::new(usb),
|
usb: Mutex::new(usb),
|
||||||
pending_ins: Mutex::new(Cell::new(0)),
|
|
||||||
ep_table: [USBEndpoint::default(); L],
|
ep_table: [USBEndpoint::default(); L],
|
||||||
|
pending_ins: Mutex::new(Cell::new(0u8)),
|
||||||
dpram_already_used: 0,
|
dpram_already_used: 0,
|
||||||
})
|
})
|
||||||
}
|
}
|
||||||
|
|
||||||
#[inline(always)]
|
#[inline]
|
||||||
pub fn get_usb_device<'u>(&'u self, cs: CriticalSection<'u>) -> &'u USB_DEVICE {
|
|
||||||
self.usb.borrow(cs)
|
|
||||||
}
|
|
||||||
|
|
||||||
#[inline(always)]
|
|
||||||
pub fn get_pll<'u>(&'u self, cs: CriticalSection<'u>) -> &'u PLL {
|
|
||||||
self.pll.borrow(cs)
|
|
||||||
}
|
|
||||||
|
|
||||||
#[inline(always)]
|
|
||||||
pub(crate) fn allocated_endpoints(&self) -> impl Iterator<Item = (usize, &USBEndpoint)> {
|
pub(crate) fn allocated_endpoints(&self) -> impl Iterator<Item = (usize, &USBEndpoint)> {
|
||||||
self.ep_table
|
self.ep_table
|
||||||
.iter()
|
.iter()
|
||||||
@@ -117,22 +113,21 @@ impl<const L: usize> UsbDevice<L> {
|
|||||||
cs: CriticalSection<'_>,
|
cs: CriticalSection<'_>,
|
||||||
endpoint_index: usize,
|
endpoint_index: usize,
|
||||||
) -> Result<(), UsbError> {
|
) -> Result<(), UsbError> {
|
||||||
|
let usb = self.usb.borrow(cs);
|
||||||
|
let endpoint_index = endpoint_index as u8;
|
||||||
|
|
||||||
if endpoint_index >= 7 {
|
if endpoint_index >= 7 {
|
||||||
return Err(UsbError::InvalidEndpoint);
|
return Err(UsbError::InvalidEndpoint);
|
||||||
}
|
}
|
||||||
|
|
||||||
let usb = self.usb.borrow(cs);
|
if usb.usbcon.read().frzclk().bit_is_set() {
|
||||||
|
|
||||||
if usb.usbcon().read().frzclk().bit_is_set() {
|
|
||||||
return Err(UsbError::InvalidState);
|
return Err(UsbError::InvalidState);
|
||||||
}
|
}
|
||||||
|
|
||||||
let endpoint_index = (endpoint_index as u8) & ENDPOINT_EPNUM_MASK;
|
usb.uenum.write(|w| w.bits(endpoint_index));
|
||||||
|
|
||||||
usb.uenum().write(|w| unsafe { w.bits(endpoint_index) });
|
if usb.uenum.read().bits() & 7 /* 0b111 */ != endpoint_index {
|
||||||
|
return Err(UsbError::InvalidEndpoint);
|
||||||
if usb.uenum().read().bits() & ENDPOINT_EPNUM_MASK != endpoint_index {
|
|
||||||
return Err(UsbError::InvalidState);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
Ok(())
|
Ok(())
|
||||||
@@ -144,27 +139,25 @@ impl<const L: usize> UsbDevice<L> {
|
|||||||
endpoint_index: usize,
|
endpoint_index: usize,
|
||||||
) -> Result<(), UsbError> {
|
) -> Result<(), UsbError> {
|
||||||
let usb = self.usb.borrow(cs);
|
let usb = self.usb.borrow(cs);
|
||||||
|
let current_endpoint = self.ep_table[endpoint_index];
|
||||||
|
|
||||||
self.select_endpoint(cs, endpoint_index)?;
|
match self.select_endpoint(cs, endpoint_index) {
|
||||||
|
Ok(_) => {
|
||||||
let current_endpoint = &self.ep_table[endpoint_index];
|
|
||||||
|
|
||||||
usb.uecfg1x().modify(|_, w| w.alloc().clear_bit());
|
|
||||||
|
|
||||||
// Enable endpoint. //
|
// Enable endpoint. //
|
||||||
|
|
||||||
usb.ueconx().modify(|_, w| w.epen().set_bit());
|
usb.ueconx.modify(|_, w| w.epen().set_bit());
|
||||||
|
usb.uecfg1x.modify(|_, w| w.alloc().clear_bit());
|
||||||
|
|
||||||
// Set markered endpoint parameters to uecfg0x/1x register. //
|
// Set markered endpoint parameters to uecfg0x/1x register. //
|
||||||
|
|
||||||
usb.uecfg0x().write(|w| unsafe {
|
usb.uecfg0x.modify(|_, w| {
|
||||||
w.epdir()
|
w.epdir()
|
||||||
.bit(current_endpoint.ep_dir)
|
.bit(current_endpoint.ep_dir)
|
||||||
.eptype()
|
.eptype()
|
||||||
.bits(current_endpoint.ep_type)
|
.bits(current_endpoint.ep_type)
|
||||||
});
|
});
|
||||||
|
|
||||||
usb.uecfg1x().write(|w| unsafe {
|
usb.uecfg1x.modify(|_, w| {
|
||||||
w.epbk()
|
w.epbk()
|
||||||
.bits(0)
|
.bits(0)
|
||||||
.epsize()
|
.epsize()
|
||||||
@@ -173,22 +166,16 @@ impl<const L: usize> UsbDevice<L> {
|
|||||||
.set_bit()
|
.set_bit()
|
||||||
});
|
});
|
||||||
|
|
||||||
usb.uecfg1x().modify(|_, w| w.alloc().set_bit());
|
if usb.uesta0x.read().cfgok().bit_is_clear() {
|
||||||
|
|
||||||
if usb.uesta0x().read().cfgok().bit_is_clear() {
|
|
||||||
Err(UsbError::EndpointMemoryOverflow)
|
Err(UsbError::EndpointMemoryOverflow)
|
||||||
} else {
|
} else {
|
||||||
usb.ueienx()
|
usb.ueienx
|
||||||
.modify(|_, w| w.rxoute().set_bit().rxstpe().set_bit());
|
.modify(|_, w| w.rxoute().set_bit().rxstpe().set_bit());
|
||||||
|
|
||||||
Ok(())
|
Ok(())
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
Err(exception) => Err(exception),
|
||||||
#[inline(always)]
|
}
|
||||||
pub(crate) fn get_size(&self, cs: CriticalSection<'_>) -> usize {
|
|
||||||
let usb = self.usb.borrow(cs);
|
|
||||||
|
|
||||||
(((usb.uebchx().read().bits() as u16) << 8) | (usb.uebclx().read().bits() as u16)).into()
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
Reference in new issue
Block a user